ÃÛÌÒÊÓƵ

Phillip M. Drayer Department of Electrical and Computer Engineering

College of Engineering

Publications

Selahattin Sayil, Ph.D.
Professor

Dr. Selahattin Sayil

Book Publications

  • Sayil, S., Soft Error Mechanisms, Modeling and Mitigation,  Springer Publishing, New York, NY, 2016 .  
    • This text included collection of my research over last eight (8) years and received very positive comments in a recent book review - “Microelectronics Reliability” journal, vol. 74, pg 81, 2017
  • Sayil, S., “Contactless Measurement and Testing Techniques”, Springer Publishing,New York, NY, 2018 . 

book-cover2ndbook.jpg

Book Chapters

  • Sayil, S., “Chapter 13.3-Soft-Error-Aware Power Optimization Using Dynamic Threshold” in VLSI: Circuits for Emerging Applications, CRC Press, ”, pp. 295-310 October 24, 2014, ISBN 9781466599093.
  • Sayil, S.,“Chapter 23-Contactless Measurement and Testing Techniques” in Advanced Circuits for Emerging Technologies, Wiley, pp. 581-597,May 2012 , ISBN-10: 0470900059.

 Refereed Journal Publications

  • Sayil, S., Lamichhane, S., Sayil, K. "Crosstalk Noise Mitigation using a Transmission Gate with Varied Gate Bias", Accepted for publication in Analog Integrated Circuits and Signal Processing, 2020. 
  • Sayil, S., "A survey of circuit-level soft error mitigation methodologies", Analog Integrated Circuits and Signal Processing, vol.99, no. 1, pp. 63-70, April 2019.
  • Sayil, S., Bhowmik, P. “Mitigating the thermally induced single event crosstalk”, Analog Integrated Circuits and Signal Processing, vol.92, no. 2, pp. 247–253, 2017.
  • Sayil, S., Shah, A.H. , Zaman, Ma, Islam, Ma,"Soft Error Mitigation using Transmission Gate with varying Gate and Body Bias", IEEE Design & Test, Volume 34, Issue: 1, pp. 47-56 , 2017.
  • Sayil, S., Yao, Y., “Single Event Coupling Delay Estimation in Nanometer Technologies", Analog Integrated Circuits and Signal Processing, vol. 86, no:2, pp. 215-225, February 2016.
  • Sayil, S., Yuan, Li, “Modeling Single Event Crosstalk Speedup in Nanometer Technologies”, Microelectronics Journal, Volume 46, Issue 5, pp. 343–35, May 2015.
  • Sayil, S., Wang, J., “Coupling induced soft error mechanisms in nanoscale CMOS technologies”, Analog Integrated Circuits and Signal Processing, Volume 79, Issue 1, pp 115-126, April 2014.
  • Sayil, S., Wang, J. Yeddula, S. R., “Single Event Coupling Soft Errors in Nanoscale CMOS Circuits”, IEEE Design and Test, Volume 30, Issue: 6, pp. 1-9, December 2013.
  • Sayil, S., Wang, J., “Single Event Soft Errors in CMOS Logic”, IEEE Potentials, Volume: 31 , Issue: 2, Page(s): 15 – 22, April 2012.
  • Sayil, S., Boorla, V. K., “Single event crosstalk prediction in nanometer technologies”, Analog Integrated Circuits and Signal Processing,July 2012, Volume 72, Issue 1, pp 205-214.
  • Sayil, S., Boorla, V.K.,Yeddula, S.R., “Modeling Single Event Crosstalk in Nanometer Technologies”, IEEE Transactions on Nuclear Science, Volume: 58 , Issue: 5 , Part: 2, pp. 2493 – 2502, October 2011.
  • Sayil, S., Patel, N. B., “Soft Error and Soft Delay Mitigation using Dynamic Threshold Technique”, IEEE Transactions on Nuclear Science, Volume: 57, Issue: 6, Part: 1, Dec. 2010.
  • Sayil, S., Akkur, A.B., “Mitigation for single event coupling delay”, International Journal of Electronics, Volume 97, Issue 1, pages 17 – 29, January 2010.
  • Sayil, S., Akkur, A.B., Gaspard, N., “Single Event Crosstalk Shielding for CMOS Logic”, Microelectronics Journal, vol. 40, no. 6, 1000-1006, 2009.
  • Sayil, S., Borra, U. K., “Coupling Delay Calculation Using Miller Factors under Exponential Waveforms”, International Journal of Electronics, vol. 96, no. 4, pp. 351 – 366, April 2009.
  • Sayil, S., Borra, U. K., “A Multiline Model for Time-Efficient Estimation of Crosstalk”, Analog Integrated Circuits and Signal Processing, vol. 59, no. 1, pp. 65 – 75, 2009.
  • Sayil, S., “On the Use of Silicon Photonics- Part I”, IEEE Potentials, vol. 28,, no. 1, pp. 35 – 39, January-February 2009
  • Sayil, S., “On the Use of Silicon Photonics- Part II”, IEEE Potentials, vol. 28, no. 2, pp. 37 – 40, 2009.
  • Sayil, S., Rudrapati, M., “Accurate Prediction of Crosstalk for RC Interconnects”, Turkish Journal of Electrical Engineering (included in the Science Citation Index Expanded), Volume 17, Issue 1, pp. 55-67, 2009.
  • Sayil, S., “Avalanche Breakdown in Silicon Devices for Contactless Logic Testing and Optical Interconnect”, Analog Integrated Circuits and Signal Processing, volume 56, no. 3, pp. 213-221, 2008.
  • Gaspard, N., Sayil, S., “Single Event Transient Crosstalk Interconnect Shielding to Complete SEU hardening of CMOS Logic Gates”, The ÃÛÌÒÊÓƵ University Electronic Journal of Student Research, Volume VIII, 2008.
  • Borra, U. K., Sayil, S., “Coupling Noise and Delay Estimation under Exponential type Waveforms”, The ÃÛÌÒÊÓƵ University Electronic Journal of Student Research, Volume IX, Fall 2008.
  • Sayil, S., Rudrapati, M., “Precise Estimation Of Crosstalk In Multiline Circuits”, International Journal of Electronics, vol.95, no:4, April 2007.
  • Sayil, S., "Optical Contactless Probing: An All-Silicon, Fully Optical Approach," IEEE Design and Test of Computers, vol. 23, no. 2, pp. 138-146, Mar/Apr, 2006-Special Feature Article, (also listed on Journal cover)
  • Anita, M., Sayil, S. “Time-Efficient Estimation of Crosstalk in Multi-Line Circuits”, The ÃÛÌÒÊÓƵ University Electronic Journal of Student Research, Volume III, 2006.
  • Sayil, S., Kerns, D.V., Kerns, Sherra E. "Comparison of Contactless Measurement and Testing Techniques to a new All-Silicon Optical Test and Characterization Method”, IEEE Transactions on Instrumentation and Measurement, Vol. 54, No. 5, pp. 2082-2089, October 2005.
  • Sayil, S., Kerns, D.V., Kerns, Sherra E., "A Survey of Contactless Measurement and Testing Techniques", IEEE Potentials, Feb/March 2005 issue, pp.. 25-28, (listed on IEEE Potentials cover)
  • Sayil, S., Kerns, D.V., Kerns, Sherra E. "All-Silicon Optical Contactless Testing Of Integrated Circuits", International Journal of Electronics, vol.89, no. 7 July 2002 p.537-547..
  • Sayil, S., "A Combine Algorithm For A CMAC Network”, PAU Journal of Engineering Science, September 2001 issue.

Peer-Reviewed Conference/Symposium Presentations/Proceedings

  • Sayil, S., Lamichhane, S., Sayil, K., "Coupling Noise Mitigation using a Pass Transistor," 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Limassol, Cyprus, 2020, pp. 358-362.
  • Sayil, S., “Compensation of Thermally-Induced Soft Errors using Forward Body-Bias”, Presented at 25th Annual Single Event Effects (SEE)/MAPLD Symposium, San Diego, May 2016.
  • Rahman, Md. M., Bhowmik, P., Sayil, S., "Mitigation of Thermally Induced Crosstalk Noise by Dynamically Adjusting Driver Strength", 2nd International Conference on Electrical Information and Communication Technology (EICT 2015).
  • Sayil, S., Yao, Yao, “Predicting Single Event Coupling Delay in Nanometer Technologies”, Presented at 24th Annual Single Event Effects (SEE)/MAPLD Symposium, San Diego, May 2015.
  • Sayil, S., Yao Y., Islam, Md. A, “Soft Error Mitigation Using Transmission Gate with Varying Gate and Body Bias”, Presented in 2014 IEEE Nuclear and Space Radiation Effects (NSREC) Conference, July 2014, Paris, France.
  • Sayil, S., Boorla, V. K., “Modeling Single Event Crosstalk in Nanometer Technologies”, Presented in International Conference on Electrical and Electronics Engineering, ELECO'11, 7-11 Nov, Bursa, Turkey.
  • Sayil, S., Patel, N., “Soft Error and Soft Delay Mitigation using a Dynamic Threshold Scheme”, Presented in 2010 IEEE Nuclear and Space Radiation Effects Conference (NSREC), Denver, CO.
  • Sayil, S., Rudrapati, M. S., Borra, U. K., "An Improved Multiline model for Precise Estimation of Crosstalk", Presented in 2007 IEEE Region 5 Technical Conference, pp. 239-245, April 20-21, Fayetteville, AR
  • Sayil, S., "On the Use of Silicon Photonics for Optical Interconnect and Contactless Logic Testing", 2007 IEEE Region 5 Technical Conference, pp. 42-48, April 20-21, Fayetteville, AR.
  • Sayil, S., Lee, K.Y. "An Hybrid Neighborhood Training and Maximum Error Algorithm for CMAC", Proceedings of the 2002 World Congress on Computational Intelligence, 5,31 2002.
  • Sayil, S., Kerns, D.V., Kerns, Sherra E., "All-Silicon Optical Technology For Contactless Testing Of Integrated Circuits", Proceedings of the International Conference on Electrical and Electronics Engineering ELECO'01, 7-11 Nov, Bursa, Turkey.
  • Sayil, S., “A Novel Contactless Scheme for IC Testing”, Pamukkale University, Denizli, Turkey, 2001

Editorship

  • Associate Editor for International Journal of Electronics, October 2008-Present
  • Corresponding Editor for IEEE Potentials (2008)